#ifndef __DRIVER_L1_CFG_H__
#define __DRIVER_L1_CFG_H__

#define SDRAM_START_ADDR		0x00000000
#define SDRAM_END_ADDR			0x00800000
#define ISRAM_START_ADDR		0xF8000000
#define ISRAM_END_ADDR			0xF8001000

#define _DRV_L1_SYSTEM			1
#define _DRV_L1_CACHE			1
#define _DRV_L1_GPIO			1
#define _DRV_L1_UART			1
#define _DRV_L1_DMA				1
#define _DRV_L1_INTERRUPT		1
#define _DRV_L1_EXT_INT			1
#define _DRV_L1_SDC				1
#define _DRV_L1_TFT				0
#define _DRV_L1_TFT2			1
#define _DRV_L1_DAC				1
#define _DRV_L1_ADC				1
#define _DRV_L1_I2C				1
#define _DRV_L1_TIMER			1
#define _DRV_L1_RTC				1
#define _DRV_L1_SPIFC			1
#define _DRV_L1_SPI				1
#define _DRV_L1_CDSP			1
#define _DRV_L1_ROTATOR			1
#define _DRV_L1_CONV420TO422	1
#define _DRV_L1_JPEG			1

#define _DRV_L1_CSI				1
#define _DRV_L1_MIPI			1

#endif // __DRIVER_L1_CFG_H__
